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Beg.
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NPTEL
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VLSI Data Conversion Circuits

Electronics - VLSI Data Conversion Circuits

Course Lessons
Chapter 1: Module 1
1 Introduction to Data Conversion
2 Sampling-1
3 Sampling-2
4 Nonidealities in Samples
5 Noise due to Sampling
6 Distortion in a Sampling Switch
7 Gate Boosted Switches-1
8 Gate Boosted Switches-2
9 Charge Injection
10 S/H Characterization - 1
11 S/H Characterization - 2
12 FFTs and Leakage
Chapter 2: Module 2
1 Spectral Windows - 1
2 Spectral Windows-2
3 ADC/DAC Definitions
4 Quantization Noise - I
5 Quantization Noise -2
6 Oversampling & Noise Shaping
7 Delta-Sigma Modulation - 1
8 Delta-Sigma Modulation - 2
Chapter 3: Module 3
1 Linearized Analysis
2 Stability of Delta Sigma Modulators
3 High Order DSMs
4 NTF Design and Tradeoffs
5 Single bit Modulators
6 Loop Filter Architectures
7 Continous-time Delta Sigma Modulation
8 Implicit Antialiasing
9 Modulators with NRZ and Impulsive DACs
10 High Order CTDSMs
Chapter 4: Module 4
1 CTDM Design
2 Excess Loop Delay (ELD)
3 ELD Compensation
4 Effect of Clock Jitter on CTDSMs - 1
5 Effect of Clock Jitter on CTDSMs - 2
6 Dynamic Range Scaling
7 Simulation of CTDSMs
8 Integrator Design-1
9 Integrator Design-2
10 Flash ADC Design
Chapter 5: Module 5
1 Latches and Metastability
2 Offset in a Latch-1
3 Offset in a Latch-2 Auto Zeroing
4 Auto Zeroing-2
5 Auto Zeroing-3
6 Autozeroing in Flash ADCs
7 Flash ADC Case Study
8 Flash ADC Case Study (contd.)
9 Flash ADC in a Delta Sigma Loop
10 DAC Basics
Chapter 6: Module 6
1 Binary and Thermometer DACs
2 Segmented DACs
3 Optimal DAC Segmentation
4 DAC Nonlinearities
5 Current Steering DACs-1
6 Current Steering DACs-2
7 DAC Mismatches in DSMs
8 Calibration and Randomization
9 Dynamic Element Matching-1
10 Dynamic Element Matching-2
Course Comments

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